My name is Jordan McGhee.

Student at Iowa State with an interest in computer microarchitectur going for a degree in computer engineering

About

I am a student studying Computer Engineering at Iowa State University. I really enjoy learning about modern computer microarchitecture and understanding the various design choices in aircraft.

I always try to understand the working of the things around me, whether it be electrical or mechanical. Some of the skills I learned while pursing my education would be -

• Low-level programming ( C, C++, Assembly )
• RTL Design (Both VHDL and Verilog)
• Hardware testing and synthesise

  • Languages: C/C++, Java, VHDL, Verilog, HTML/CSS/Javascript, VBScript
  • Libraries: CUDA, OpenGL,
  • Tools & Technologies: Git, Quartus Prime, Modelsim, Virtuoso, Genus, Innovus

Experience

Tech Intern
  • Developed and managed many projects, most of which involved both front-end and back-end work.
  • Created a parser for interpreting action point expressions into reactive form components in angular. Created numerous APIs, one of which dynamically querries and generates json for display with ChartJs.
  • Worked on existing framework for maintaing mappings between carrier risk classifications and insurezone business classes.
  • Helped improve various UI components.
  • Tools: Java, Javascript, CSS, Angular, VBScript
May 2018 - Present | Oelwein, Iowa
Tech Team Member
  • Worked primarily as a macbook technician, repairing and salvaging broken laptops for both teachers and students.
  • Helped troubleshoot and fix technology issues experienced by the Oelwein High School faculty.
  • Helped setup technology for various school functions ( Computers, laptops, projectors ).
Aug 2015 - May 2017 | Oelwein, Iowa

Projects

music streaming app
CUDA Accelerated Particle Simulation

A piece of software for simulating gas particles

Accomplishments
  • Allowed me to familiarize myself with the basics of CUDA.
  • Learned how to use OpenGL
  • Helped me understand the types of communication that goes on between the CPU and GPU.
quiz app
Mips Processor

Working Design and Verified Processor

Important Notes
  • Made designs for single-cycle, pipelined processors.
  • Created using both VHDL and Verilog
  • Verified with python scripting
  • Optimized and Generated Layout
Screenshot of web app
MTCP Network Protocol

A basic implementation of the MTCP Protocol

Important Information
  • Allowed for the fast transfering of text files.
  • Implemented across multiple threads to increase speed.
  • Required mapping data being sent to a specific tcp connection on a specific thread.

Skills

Languages

MIPS Assembly
C/C++
Java
Python
HTML/CSS
Javascript
VHDL
Verilog

Notable Coursework

Small Signal Circuit Analysis
General Algorithms
3D Modeling
Digital Circuit Design

Software

Virtuoso
Modelsim
Quartus Prime
Inventor
Cura

Education

Iowa State University

Ames, Iowa

Degree: Bachelor's in Computer Engineering
Graduation: 05/08/2023
CGPA: 3.2/4.0

    Relevant Courseworks:

    • Assembly Language and Pipelined Processors
    • RTL Design and Synthesise
    • Algorithms
    • Principles of Anolog and Digital Circuits
    • Network Protocols and Creation

Iowa State University

Ames, Iowa

Degree: Master's in Computer Engineering
Expected Graduation: 05/08/2025
CGPA: 3.2/4.0

    Relevant Courseworks:

    • Computer microarchitecture Design
    • Hardware Performance and Security
    • VLSI Design

Contact